Create Autohotkey Script To Automate Your Pc Task
Delivery Time: 2 days
Service Includes: No Revisions
I have been working as an R&D Engineer experience in Verilog and VHDL domains.
My areas of expertise include,
- RTL design using Verilog/VHDL
- Validation with UVM testbenches
- Experience in working with Xilinx and Altera FPGA Boards
- Implementation of Embedded system and on target hardware and running software applications Simulation with comments and explanation
I am looking forward to build a strong relationship and I will provide following in details.
- Verilog source code
- VHDL source code
- Schematic
- Truth tables
- Testbenches
- Simulation results
Note: Kindly contact me before placing an order!